Video time base corrector

ABSTRACT

In a time base corrector which converts incoming video signals to digital form and writes the digitized signals in a memory at a clocking rate varying generally in accordance with time base errors in the incoming signals, whereupon the signals temporarily stored in the memory are read out or fetched therefrom at a standard clocking rate and reconverted to analog form for eliminating the time base errors; the memory is composed of a plurality of cyclically enabled memory units which each have a capacity to store an even number of line intervals of the video signals.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to the processing of periodic informationsignals, such as, video signals, and more particularly is directed toapparatus by which time base errors introduced during recording and/orreproducing of such signals may be removed.

2. Description of the Prior Art

Video signals are frequently recorded on magnetic tape and subsequentlyreproduced for later broadcasting or viewing purposes. During thereproduction of recorded video signals, time base or frequency errorsare usually introduced by reason of expansion or contraction of therecord medium during or after recording, variation in the speed of thetape relative to the magnetic head or heads during recording orreproduction, variation between the tape recording speed and the tapereproducing speed, and the like. The presence of such time base errorsin the reproduced video signals cause a frequency shift of the latterwhich can result in many observable undesirable effects, particularlywhen the reproduced video signals are to be transmitted or broadcast andmay be mixed with live broadcast material that do not have such timebase errors. The observable undesirable effects resulting fromrelatively small time base errors are a smeared or jittery picture witherroneous intensity variations and, in the case of color video signals,improper color display. When the time base errors are large, thereproduced picture will fail to lock horizontally or vertically.

In an existing time base corrector for substantially removing time baseerrors from video signals, for example, as disclosed in U.S. Pat. No.3,860,952, issued Jan. 14, 1975, the incoming video signals areconverted from analog to digital form and temporarily stored in amemory. Time base errors are removed from the video signals by writingthe digitized signals in the memory at a clocking rate which varies in amanner generally proportional to the time base errors, and by fetchingor reading out these stored signals at a standard clocking rate. Aftersuch reading out of the digitized video signals, the latter arereconverted to analog form and applied to an output terminal. The memoryused in the known time base corrector comprises a plurality of memoryunits each capable of storing a plurality of horizontal lines of videoinformation. A sequence control unit controls the selection of eachmemory unit for writing and reading so that the sampled videoinformation is sequentially stored by cyclically enabling the pluralityof memory units and serially storing one or more lines of digitizedvideo information in each selected memory unit, and further so that,contemporaneously with the storage of sampled video information in aselected memory unit, and sequence control unit enables the videoinformation stored in a different one of the memory units to besequentially fetched or read out therefrom, with the enabling of thememory units for the reading out of the information stored therein beingalso effected in a cyclical manner.

Further, it has been proposed that, in a time base corrector asdescribed above, those line intervals of the incoming video signals inwhich dropouts occur should be omitted from the output of the time basecorrector and replaced by previously stored line intervals of similarvideo information.

However, problems are encountered in the above described time basecorrectors, particularly when used for correcting time base errors inNTSC color video signals. More particularly, as is well known, thepolarity or phase of the chrominance subcarrier is reversed forsuccessive horizontal or line intervals of NTSC color video signals.Therefore, if the time base corrector is designed, as described above,so as to compensate for dropout by substituting for the line interval orintervals containing dropout, a previously stored line interval orintervals of similar video information, the chrominance subcarrier ofeach substituted line intervals of video information in the output hasto have the same polarity or phase as the chrominance subcarrier of thereplaced line interval. Thus, the time base corrector requires arelatively complicated circuit arrangement for detecting the phase orpolarity of the chrominance subcarrier and for controlling the phase orpolarity of the chrominance subcarrier in the output from the time basecorrector so as to ensure that the same is reversed for successive lineintervals even when compensating for drop out in the incoming videosignals.

Furthermore, in time base correctors, as described above, the time baseerror of the incoming video signals is usually detected from the burstsignals of the latter. Therefore, the frequency of the write clock pulsesignal modulated by the time base error, that is, the frequency at whichthe digitized signals are sampled for writing in the memory, is selectedto be a whole multiple of the burst or chrominance subcarrier frequencyf_(c) which, in the case of NTSC color video signals, is about 3.58 MHz.It is also necessary that the write clock pulse frequency be ininterleaving relation to the horizontal or line frequency f_(h) of theincoming video signals which is 15.75 KHz in the case of NTSC colorvideo signals. Such interleaving relation is achieved when the writeclock pulse frequency is (2n-1)/2 × f_(h), in which n is any desiredinteger. However, since the burst frequency 3.58 MHz of an NTSC colorvideo signal is 15.75 KHz × 1/2 × 455, the interleaving relation of thewrite clock pulse frequency to the horizontal or line frequency can beachieved when the write clock pulse frequency is selected to be (2N-1) ×f_(c), in which N is any desired integer. Thus, for example, when thewrite clock frequency is 10.74 MHz, that is, 3×f_(c) for NTSC signals,the incoming video signals are sampled 682.5 times during eachhorizontal or line interval thereof. This means that, in alternatehorizontal or line intervals of the incoming video signals, 682 and 683words are respectively written in the memory units which are selectivelyenabled for the writing operation. The different number of words to bestored in the memory units during successive line intervals of incomingNTSC color video signals may result in complexity of the sequencecontrol unit for controlling the writing and reading operations.

OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, it is an object of this invention to provide a time basecorrector of the type described above, and in which time base errors maybe removed from video or other periodic information signals without theabove mentioned problems encountered in the prior art.

More specifically, it is an object of this invention to provide a timebase corrector of the described type which facilitates sequentialcontrol of the writing of the video or other periodic information in theseveral units of the memory and of the reading out of such storedinformation notwithstanding the fact that such information may becomprised of different numbers of words for the alternately occurringlines or other periodic intervals of the incoming signals.

Another object is to provide a time base corrector, as aforesaid, whichis further operative to remove any dropouts occurring in incoming NTSCcolor video signals without regard to the reversal of phase or polarityof the chrominance subcarrier of such signals for successive lineintervals thereof.

In accordance with an aspect of this invention, in a time base correctorwhich converts incoming video or other periodic information signals todigital form and writes the digitized signals in a memory at a clockingrate varying generally in accordance with time base errors in theincoming signals, whereupon the signals temporarily stored in the memoryare read out or fetched therefrom at a standard clocking rate andreconverted to analog form for eliminating the time base errors; thememory is composed of a plurality of cyclically enabled memory unitswhich each have a capacity to store an even number of line or otherperiodic intervals of the video signals. Therefore, even thoughalternate lines of the video signals, as written, may be comprised ofdifferent numbers of words, each memory unit will have the same numberof words to be written therein and to be fetched therefrom forfacilitating the sequence control of the memory. Further, by storing aneven number of line intervals of video information in each of the memoryunits, line intervals in which a dropout is detected can be convenientlyreplaced in the output from the time base corrector by other stored lineintervals of similar information which is free of dropout even though,as in the case of NTSC color video signals, the alternate line intervalshave chrominance subcarriers with different phases or polarities.

The above, and other objects, features and advantages of the invention,will be apparent in the following detailed description of anillustrative embodiment which is to be read in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic block diagram of a time base corrector accordingto an embodiment of this invention;

FIG. 2 is a schematic diagram illustrating a color video signal that maybe applied to the time base corrector of FIG. 1 for removal of time baseerrors from such signal;

FIG. 3 is a timing chart showing the cyclic orders in which signalinformation may normally be written in, and read out of the severalmemory units of the time base corrector of FIG. 1; and

FIG. 4 is a timing chart similar to that of FIG. 3, but illustrating thesequences in which signal information may be written and read whendropout is detected.

DESCRIPTION OF A PREFERRED EMBODIMENT

Referring to the drawings in detail, and initially to FIG. 1 thereof, itwill be seen that a time base corrector 10 to which this invention maybe applied has an input terminal 11 for receiving periodic informationsignals, such as composite color video signals reproduced by a so-calledVTR and having time base errors. If the reproduced composite color videosignals applied to terminal 11 are not already in the standard NTSCform, such signals are applied to a demodulator 12 which may include anNTSC encoder. The resulting NTSC color video signals are applied througha buffer amplifier 13 to a sample-hold circuit 14 and from the latterthrough an amplifier 15 to an analog-to-digital (A/D) converter 16. Asshown, a D.C. restoring loop 17 is provided between amplifiers 13 and 15so that the NTSC color video signals are sampled in D.C. restored form.

The D.C. restored NTSC color video signals issuing from amplifier 13 arefurther applied to a separator 18 which separates horizontalsynchronizing signals therefrom, and to a separator 19 which is gated bythe separated horizontal synchronizing signals so as to separate burstsignals from the NTSC color video signals. The separated horizontalsynchronizing signals and burst signals are applied to a write clockgenerator 20 which, as is known, produces write clock pulses WRCK havinga relatively high frequency, for example, of about 10.74 MHz which isthree times the color or chrominance subcarrier frequency f_(c) for NTSCsignals, and with their frequency or repetition rate being varied inaccordance with changes in the frequency of the subcarrier burst signalsextracted from the incoming color video signals so as to closely follow,or be dependent upon time base errors in such incoming signals.

Further, it will be seen that the write clock pulses WRCK issuing fromgenerator 20 and having a frequency of approximately 10.74 MHz areapplied to A/D converter 16 and to sample-hold circuit 14 to control therate at which the latter samples the demodulated or detected videosignals and the rate at which converter 16 converts the sampled signalsfrom their original analog form into digital form. More specifically, inresponse to each write clock pulse from generator 20, A/D converter 16is operative to sample the demodulated video signal and convert thelatter into a plurality of parallel bit signals, for example, digitalinformation of eight parallel bits. In the case of NTSC color videosignals having a horizontal or line frequency f_(h) of 15.75 KHz, therewill be 682.5 samples or words of digital information for eachhorizontal or line interval of such video signals when the latter aresampled at the rate of 10.74 MHz, as described above.

The parallel bits of digitized signal information are supplied fromconverter 16 to a memory 21 by way of a digital information bus 16awhich, for ease of illustration, is represented by a double line. Thememory 21 is shown to include memory units MU-1, MU-2, MU-3 and MU-4,each of which is comprised of a plurality of shift registers equal innumber to the number of parallel bits making up each word of thedigitized video signals. Thus, in the example being described, each ofthe four memory units MU-1, MU-2, MU-3 and MU-4 is made up of eightshift registers.

In accordance with this invention, each shift register of the memoryunits MU-1, MU-2, MU-3 and MU-4 is selected to have a storage capacityor memory which, in consideration of the frequency of the write clockpulses from generator 20, is sufficient to store the digitizedinformation corresponding to an even number, that is, 2,4,6,8 - - -etc., of the horizontal or line intervals of the incoming video signals.As previously indicated, in the case of NTSC color video signals and awrite clock pulse frequency of about 10.74 MHz, there are 682.5 words ofdigital information for each horizontal or line interval indicated at Hon FIG. 2. However, in the time base corrector according to thisinvention, the horizontal synchronizing signals and burst signalsoccurring during the interval α in each horizontal blanking period arepreferably stripped from the incoming video signals prior to theconversion of the latter digital form so that, for example, only 640words of digital information need to be accommodated in the registers ofmemory units MU-1, MU-2, MU-3 and MU-4 for each of the even number ofhorizontal or line intervals to be stored therein. Thus, if the digitalinformation corresponding to two horizontal or line intervals is to bestored in each of the memory units MU-1, MU-2, MU-3 and MU-4, theregisters of such memory units have to have capacities for 1280 wordscorresponding to the sampling in the period 2H-2α, as indicated on FIG.3.

The separated horizontal synchronizing signals are further shown to beapplied to a write start generator 22 which produces a write start pulseWST, for example, at the beginning of every second horizontal or lineinterval of the incoming video signals in the case where digitalinformation corresponding to two horizontal or line intervals is to bestored in each of the memory units.

The write start pulses WST from generator 22, and the write clock pulsesWRCK from generator 20 are applied to a system control circuit 23 whichcontrols the operations of a memory control circuit 24 for effecting theselective writing and reading operations of the memory units MU-1, MU-2,MU-3 and MU-4. More particularly, under normal circumstances, systemcontrol circuit 23 causes memory control circuit 24 to produce writecontrol signals I₁, I₂, I₃ and I₄ occurring in a repeating cyclic orderand which are respectively applied to the memory units MU-1, MU-2, MU-3and MU-4 in order to determine the sequences in which such memory unitsare selected or enabled for the writing, in the selected memory unit, ofthe digitized information corresponding to two, or any other even numberof horizontal or line intervals of the incoming video signals. Further,the memory control 24 receives the write clock pulses WRCK fromgenerator 20 and, during the writing period determined by the writecontrol signal I₁, I₂, I₃ or I₄, the memory control 24 supplies thewrite clock pulses WRCK from one of its clock outputs CK₁, CK₂, CK₃ andCK₄ to the respective memory unit MU-1, MU-2, MU-3, or MU-4 which isthen selected ro enabled for writing, so that the digitized informationcorresponding to two horizontal or line intervals of the video signalsis written in the shift registers of the selected memory unit at theclocking rate determined by the frequency of the write clock pulses WRCKwhich varies in accordance with time base errors in incoming videosignals.

After momentary storage in memory units MU-1, MU-2, MU-3 and MU-4, thedigitized video signal information is read out therefrom in apredetermined sequence, as hereinafter described in detail, to aninformation or data bus 25. In order to determine the clocking rate atwhich the digitized information is read out of each of the memory units,the illustrated time base corrector 10 includes a standard syncgenerator 26 which supplies a carrier signal at a fixed or standardfrequency, for example, the standard chrominance subcarrier frequencyf_(c) of 3.58 MHz for NTSC color video signals, to a read clockgenerator 27 which, in turn, produces read clock pulses RCK at astandard frequency, for example, 10.74 MHz., at least at the beginningand end of each reading period. The carrier signal at a fixed orstandard frequency is further shown to be applied to a read startgenerator 28 which produces a read start pulse RST, for example, atintervals corresponding to two horizontal or line intervals for NTSCvideo signals.

The read start pulses RST from generator 28 are applied to systemcontrol circuit 23, and the read clock pulses RCK are applied fromgenerator 27 to system control circuit 23 and memory control circuit 24.Under normal circumstances, system control circuit 23 causes memorycontrol circuit 24 to produce read control signals O₁, O₂, O₃ and O₄occurring in a repeating cyclic order and which are respectively appliedto memory units MU-1, MU-2, MU-3 and MU-4 in order to determine thesequence in which such memory units are selected or enabled for thereading out therefrom of the digitized information corresponding to two,or any other even number of horizontal or line intervals, which had beenpreviously stored in the selected memory unit. Further, during eachreading period determined by the read control signal O₁, O₂, O₃ or O₄,the memory control circuit 24 supplies the read clock pulses RCK from arespective one of its clock outputs CK₁, CK₂, CK₃ and CK₄ to theselected or enabled memory unit, so that the digitized informationcorresponding to two horizontal or line intervals of the video signalsis read out of the shift registers of the selected memory unit at thestandard clocking rate of the read clock pulses RCK.

The read clock pulses RCK are also applied to a buffer memory 29, whichreceives the digitized information sequentially read out of memory 21,and to a digital-to-analog (D/A) converter 30 which is operative toconvert the buffered digital output of memory 29 back to the originalanalog form. The analog output of D/A converter 30 is applied to aprocessor 31 which receives the standard frequency carrier signal fromgenerator 26, and which is operative to add to the output of converter30 the color burst and composite synchronizing signals which werepreviously stripped from the incoming video signals. The resultingcomposite color video signals are then obtained at an output terminal 32of processor 31.

In order to correct for velocity errors that may appear in the incomingvideo signals, the time base corrector 10 to which this invention isapplied may further detect the velocity error at the write clockgenerator 20 during each writing period and then supply the detectedvelocity error to a velocity error memory 33 by way of a velocity errorhold circuit 34. The velocity error memory 33, under the control ofsystem control circuit 23, memorizes the velocity error detected duringthe writing period of each of the memory units MU-1, MU-2, MU-3 andMU-4, and, during the reading period of each of the memory units,applies a corresponding velocity error correcting signal to read clockgenerator 27 by which the read clock pulses RCK from the latter aresuitably modulated to eliminate or compensate for the velocity errors.Thus, the read clock pulses RCK, while having the standard frequency atthe beginning and end of each reading period, may vary during suchreading period.

In any event, it will be apparent that, in the time base corrector 10,as described above, successive line intervals of the incoming videosignals are written in memory 21 at a clocking rate which variesgenerally in accordance with the time base errors of the incomingsignals, and that the video signals are read out from memory 21 at astandard clocking rate so that the video signals obtained at outputterminal 32 have any time base errors removed therefrom.

Further, in the time base corrector 10 to which this invention isapplied, the memory units MU-1, MU-2, MU-3 and MU-4 are preferablyprovided with recycle loops 35₁, 35₂, 35₃ and 35₄, respectively, so thatupon the occurrence of the read control signal O₁, O₂, O₃ or O₄ forcausing reading out of the digital information stored in a memory unit,the information being read out from the selected memory unit issimultaneously applied through the respective recycle loop to the inputof the selected memory unit so as to be rewritten in the latter. Theforegoing arrangement is shown to be provided in association with adropout detector 36 which is connected with input terminal 11 fordetecting any dropout in the incoming video signals and providing acorresponding dropout signal DO to the system control circuit 23, andwith a dropout memory 37 in which information concerning the occurrenceof dropout in the incoming video signals is stored for influencing thewriting and reading sequences of the memory units so as to eliminatesuch dropout from the time base corrected video signals obtained atoutput terminal 32.

Referring now to FIG. 3, it will be seen that, in a time base correctorembodying this invention, the cyclically occurring write control signalsI₁, I₂, I₃ and I₄ for sequentially writing digital informationcorresponding to two, or any other even number of horizontal or lineintervals, in each of the memory units MU-1, MU-2, MU-3 and MU-4 maynormally occur simultaneously with the cyclically occurring read controlsignals O₃, O₄, O₁ and O₂, respectively, for sequentially reading outthe digital information previously stored in the respective memory unitsMU-3, MU-4, MU-1 and MU-2, respectively. Thus, in the successive timeperiods t₀ -t₁, t₁ -t₂, t₂ -t₃, t₃ -t₄ t₄ -t₅, - - - etc., digitalinformations corresponding to line intervals L₁ and L₂, L₃ and L₄, L₅and L₆, L₇ and L₈, L₉ and L₁₀, - - - etc., are written sequentially inmemory units MU-1, MU-2, MU-3, MU-4, MU-1, - - - etc. Correspondingly,the digital informations representing line intervals L₁ and L₂, L₃ andL₄, L₅ and L₆, - - - etc. are read out of the respective memory unitsMU-1, MU-2, MU-3 - - - etc., during the time intervals t₂ -t₃, t₃ -t₄,t₄ -t₅, - - - etc.

Since each memory unit stores digital information corresponding to aneven number of horizontal or line intervals of the video signals, noproblem is encountered in controlling the writing and reading operationseven if, as in the case of NTSC color video signals, the frequency ofthe write clock pulses modulated by the time base errors results in thedigital information representing each add numbered line interval, suchas, the line intervals L₁, L₃, L₅, L₇, L₉, containing a different numberof words than the digital information representing each even numberedline interval, such as, the line intervals L₂, L₄, L₆, L₈, L₁₀. In otherwords, since each memory unit has an equal number of odd and evennumbered line intervals stored therein, the digital informations storedin all of the memory units contain the same numbers of words.

Further, by storing digital information representing an even number ofhorizontal or line intervals in each of the memory units, as inaccordance with this invention, changes in the polarity or phase of thechrominance subcarrier for the odd-numbered and even-numbered lineintervals of NTSC color video signals, for example, as indicated by thesymbols (+) and (-) on FIGS. 3 and 4, do not cause any problems whenline intervals of the incoming video signals containing dropouts arereplaced, in the time base corrector, by other similar line intervalswhich are free of dropout, whereby to eliminate dropout from the timebase corrected video signals.

Thus, if the present invention is applied to a time base correctorhaving a dropout compensating arrangement of the type disclosed indetail in U.S. Pat. Application Ser. No. 642,197, filed Dec. 18, 1975,and having a common assignee herewith, the detection of dropout, forexample, in one or both of the video signal line intervals L₃ and L₄being written in memory unit MU-2 during the time interval t₁ -t₂, maycause the writing period for the memory unit MU-2 to be extended for thetime interval t₂ -t₃ during which the information corresponding to lineintervals L₃ and L₄ is driven out of memory unit MU-2 and replaced inthe latter by information corresponding to line intervals L₅ and L₆,assuming that the latter are free of dropout, as shown on FIG. 4. Inother words, the sequencing of the write control signals I₁ -I₄ may beinhibited or interrupted in response to detection of dropout. Similarly,the detection of dropout may inhibit the sequencing of the read controlsignals O₁ -O₄, so that, in the example illustrated on FIG. 4, thereading of the contents of memory unit MU-1 in the time interval t₂ -t₃is repeated in the next time interval t₃ -t₄. The foregoing is, ofcourse, made possible by the recycle loops 35₁ -35₄ which, during thereading of each memory unit, rewrite the information being read in therespective memory unit. Therefore, if dropout occurs in one or both ofthe line intervals L₃ and L₄, the output of the time base corrector thenrepresents the video signals for the line intervals L₁ (+), L₂ (-), L₁(+), L₂ (-), L₅ (+), L₆ (-), L₇ (+), L₈ (-), - - - etc. Thus, asindicated by the symbols (+) and (-), the alternate line intervals ofthe corrected output have chrominance subcarriers of reversed phase asis required for NTSC color video signals.

It will be appreciated that, if dropout is similarly compensated in adigital time base corrector in which one, three or some other odd numberof line intervals of video information is stored in each memory unit, asspecifically disclosed in the prior art, complex circuits have to beprovided to ensure that each line interval of video information which issubstituted for a line interval containing dropout has a chrominancesubcarrier of the same phase as that of the line interval which isreplaced.

Although an illustrative embodiment of the invention has been describedherein with reference to the accompanying drawings, it is to beunderstood that the invention is not limited to that embodiment, andthat various changes and modifications may be effected therein by oneskilled in the art without departing from the scope or spirit of thisinvention as defined in the appended claims.

What is claimed is:
 1. In a time base corrector which converts incoming information signals having periodic signal intervals to digital form and writes the digitized signals in a memory at a clocking rate which is modulated in accordance with time base errors in the incoming signals, whereupon the digitized signals temporarily stored in the memory are read out therefrom substantially at a standard clocking rate and the resulting digitized output from the memory is reconverted to analog form for eliminating the time base errors; said memory comprises a plurality of cyclically enabled memory units each of which stores a quantity of said digitized signals representing an even number of said periodic signal intervals of said information signals.
 2. A time base corrector according to claim 1; in which said incoming signals are color video signals, and said periodic signal intervals are horizontal line intervals of said color video signals.
 3. A time base corrector according to claim 2; in which said color video signals include composite synchronizing signals and burst signals which are stripped from said color video signals prior to said conversion of the latter to said digital form; and in which each of said memory units has a capacity to store said digitized signals representing an even number of said line intervals stripped of said composite synchronizing signals and said burst signals.
 4. A time base corrector according to claim 2; in which said color video signals are NTSC signals, and said clocking rate which is modulated in accordance with time base errors in said incoming signals is a whole multiple of a chrominance subcarrier frequency for said NTSC signals and is in interleaving relation to the horizontal line frequency for said NTSC signals.
 5. A time base corrector according to claim 2; in which means are provided to detect dropout in said incoming signals and, in response thereto, to replace, in said output from said memory, those of said digitized signals representing an even number of said line intervals which include a detected dropout with a repeated read out from one of said memory units of said digitized signals which represent the same even number of line intervals which are free of a detected dropout.
 6. A time base corrector according to claim 5; in which said color video signals are NTSC signals having chrominance subcarriers of reversed phases for alternate line intervals thereof, and in which said reversed phases of said chrominance subcarriers for alternate line intervals is preserved in said output from the memory when reconverted to analog form by reason of said storing of an even number of said line intervals in each of said memory units. 